The present invention relates to a method and apparatus for testing a multi-processor system and in particular to a testing method and apparatus for a multi-processor system which is capable of controlling accessing of a plurality of processors to arbitrary input/output devices at random.
A testing program for the purpose of multiple working tests of input/output devices of an information processing system is needed to have a control function of starting a plurality of input/output devices with high efficiency and checking responses from the input/output devices. Such control function involves processings determined by program structures and logics. For this reason, in general, the testing program has a scheduler controlling the order of starting of the input/output devices and an input/output control table storing status information of each of the input/output devices. However, heretofore, according to the control function, each of the input/output devices is accessed by a specified processor corresponding to a certain job or task while inhibiting the other processors from accessing thereto. Accordingly, in the case where a multi-processor system becoming more and more important in general-purpose large scale systems is tested, the prior art method has drawbacks that reliability of the test is not satisfied and that the time required for the test increases. This is because the multi-operation of the input/output device must be increased and the start control of the input/output devices needs to be performed at random. A prior art example of this kind has been disclosed in JP-A-No. 60-72039, in which a task for monitoring each task under execution is provided to detect the condition of the execution task by a register for reference.